Advanced IC Design and Software Engineering Training

Migrating from ASIC Design to IP-based SoC Design

1st Day(9:00AM ~ 12:00AM) 1 Opening Remark 2 ASIC Design ? The State-of-the-Art Vs The State-of-the-Practice Revisited

2.1 SW Solution vs. HW Solution: Pros & Cons
2.2 ASIC Vs FPGA: Pros & Cons
2.3 ASIC Vs SoC: Pros & Cons
2.4 Traditional Constraints in Design Space Exploration: Die Size, Speed & Power
2.5 Challenges & Solutions for Timing Closure in ASIC design 1 Challenges & Solutions for Signal Integrity in ASIC design 2 Challenges & Solution for Low Power & High Speed for both ASIC & SoC Designs

3.1 The Sources of Power Consumption: Static, Dynamic & Leakage
3.2 Key Low Power Techniques Revisited
3.3 The Speed Bottlenecks: Computation & I/O
3.4 Key High Speed Techniques Revisited
3.5 High Speed & Low Power ? ASIC Way Vs SoC Way 1 Why IP based SoC Design and Why IP-based SoC Design Is Not Your Silver Bullet? 2 Open Discussion

1st Day(1:00PM ~ 4:00PM) 1. Unique Aspects of IP based SoC Design ? IP based Design Reuse
1.1 From Parameterized Design to Truly Configurable Design
1.2 Commercial IP Vs Custom IP
1.2.1 Commercial Star IP In-Depth: ARM Vs MIPS
1.2.2 Commercial Commodity IP: DesignWare among others
1.3 Challenges in IP based SoC design
1.3.1 Why Design Glue Logic Is So Painful?
1.3.2 Design for Reuse: IP-centric or Interconnect-Centric?1.3.3 Design for Reuse: How to Separate Communication from Computation
1.3.4 Design for Reuse: How to Deal with Legacy IP?
1.3.4 Design for Reuse: How to Deal with 3rd-party Proprietary Bus Architecture?
1.3.4 Design for Reuse: How to Strike the Balance between Reusability & Performance?
1.4 Leading IP based Sock Standards: OCP-IP, AMBA ,VSIA among Others
1.5 SoC Design In Practice
1.5.1 Specification & Requirements for IP based SoC Design
1.5.2 IP Selection Basic Criteria
1.5.3 IP Integration & Model Generation
1.5.3.1 Adding Glue Logic to 3rd-party IP
1.5.3.2 Modifying Custom IP
1.5.4 Verification & Testing
1.5.4.1 Stand Alone Verification & Testing
1.5.4.2 System Test Verification & Testing
1.5.5 Project Management Issues 1 Tips & Guidelines for IP based SoC Design 2 Open Discussion

2nd Day (9:00AM ~ 12:00AM) 1. Unique Aspects of IP based SoC Design ? Changes in EDA Flows1.1 COT flow as Opposed to ASIC flow
1.2 Physical Design Issues
1.3 Analog/Mixed-Signal Design Issues
1.4 COT Flow Setup, Validation & Turning 1 Managing Transitions from ASIC flow to COT flow2. From ASIC Design to SoC Design ? Changes in Design Practice 2 Changes in Modeling

2.1.1 From C/C++ based Modeling to SystemVerilog/SystemC based Modeling
2.1.2 HW/SW Co-modeling Issues
2.1.3 On Blackbox based Modeling with Abstraction for Hard IP 2.2 Changes in Synthesis
2.2.1 RTL Floorplanning & Rapid Synthesis for better Design Space Exploration
2.2.2 From Module/Block Centric Synthesis to IP Centric Integration
2.2.3 Clock Srategy & Hybrid CTS in SoC Design
2.2.4 Power Structure & Power Planning in SoC Design
2.2.5 Differentiation in Synthesis Goals & Strategies2.3 Changes in Testing
2.3.1 From DFT to BIST
2.3.2 More Testing Jobs to be Done as Opposed to ASIC Design
2.4 Changes in Verification
2.4.1 On Verification Reuse
2.4.2 On Smart Verification
2.5 Changes in Validation
2.5.1 FPGA based Prototyping is a Must
2.5.2 HW/SW Co-Simulation and Cross Validation in Considering SW Issues

3. Open Discussion

2nd Day (1:00PM ~ 4:00PM) 1. Unique Aspects of IP based SoC Design ? Changes in EDA Flows
1.1 COT Flow as Opposed to ASIC Flow
1.2 Physical Design Issues
1.3 Analog/Mixed-Signal Design Issues
1.4 COT Flow Setup, Validation & Turning 1 Managing Transitions from ASIC Flow to COT Flow 2 Unique Aspects of IP based SoC Design ? SW Design Issues

2.1 Differentiate Your Design with SW ? From Product to Product-Line

2.2 SW/HW Partitioning Issues in IP-based SoC Design
2.3 Instruction Set Architecture (ISA) Issues in IP-based SoC Design
2.4 Customer compiler issues in IP-based SoC Design
2.5 RTOS Issues in IP-based SoC Design ? In-House Vs Commercial
2.6 SW/HW Interface Issues in IP-based SoC Design 1 Embedded SW Design from HW Point of View 2 Case Study: IP-based SoC Design in Powering Pervasive Media Application

3. Open Discussion

Back to Home Page