Advanced IC Design and Software Engineering Training

Technical Aspects of IC Project Management Program Agenda (Subject to Change without Notice) Date Agenda

1st Day (9:00AM ~ 12:00AM) 1 Opening Remark

2 ASIC Design Project in a Nut Shell

2.1 Phases of an ASIC Project
2.2 Requirement & Specification Phase
2.3 Front-end Design Phase
2.3.1 Top-Level Design Phase
2.3.2 Module Specification Phase
2.3.3 Module Design Phase
2.3.4 Top-level Integration Phase
2.4 Layout Phase
2.5 Post-Silicon Phase
2.6 Production Phase 1 Project Leader Tasks 2 Essence of IC Design Project Management

3.1 Fundamental Principles of Project Management
3.2 Fundamental Jargons in Project Management ? Phases, Milestones, Buffer Time, 3cheduling, Allocation, Productivity, Performance
3.3 IC Design Processes: Heavyweight Methodology Vs Lightweight Methodology
3.4 IC Design Processes Phases: Initiating, Planning, Executing, Controlling and Closing
3.5 IC Design Knowledge Areas: Integration Management, Scope Management, Time Management, Cost Management, Quality Management, Resource Management, Communication Management & Risk Management
3.6 The IC Design Project Success Rectangle: Product, Process, Technology & People
3.7 IC Design Artifacts & Their Templates: Product Vision, Business Case, Design Proposal, Design Feasibility Review, Design Implementation Review, Design Specification, Data Sheet

4. Open Discussion

1st Day(1:00PM ~ 4:00PM) 1. Fundamentals in IC Design Project Management
1.1 Development Tasks & Responsibilities Establishment
1.2 Resource Planning & Allocation
1.3 Risk Assessing & Contingencies Development
1.4 Design Artifacts Management
1.5 Reviewing & Inspection Process
1.6 Common Problems Expected during a Project: Schedule Slipping, Die Size Bigger Than Prediction, Timing Closure Nightmare & Silicon Re-spin
1.7 Factors May Impact Design Decision: Time-to-Market, Time-to-Tape-Out, Die Size, Block Design Time, System Integration Time, Functional Verification Time, Manufacturing Test Time, Quality & Reliability
1.8 IC Design Effort: EDA Tools/Methodology, Inherent Design Complexity, Engineering Capability, Leadership & External Effort 1 Key Performance Indicators & Metrics 2 Planning, Executing & Tracking ASIC Projects in Reducing Project Risks

2.1 Overview
2.2 Basic Planning Concepts
2.3 Process for Creating a Plan
2.3.1 Definition of Deliverables
2.3.1 Task Breakdown
2.3.2 Assigning Dependencies
2.3.3 Allocation of Resources
2.3.4 Refining the Plan
2.3.5 Reviewing the Plan
2.4 Tracking Methods
2.4.1 Trade-Offs Between Functionality, Performance, Cost and Timescales
2.4.1 Build up the Team
2.4.2 ASIC Architecture
2.4.3 High-Level Architectural Modeling
2.4.4 Interface Specifications
2.4.5 Managing Changing Design Requirements
2.4.6 On Programmability
2.4.6 Regular Design Reviews
2.4.7 Early Trial Synthesis for Architecture Design Space Exploration
2.4.8 Early Trial Layouts for Physical Design Space Exploration
2.5 Reducing the Risk of Design Bugs: Simulation, Emulation, Formal Verification, FPGA Prototyping & RTL Virtual Prototyping
2.6 Gate-level Sign-Off Vs RTL Sign-off
2.7 Risks in Meeting ASIC Vendor Criteria 1 Power Consumption Issues 2 EDA Flow Set-up, Validation & Retooling ? The Fundamental Issue in IC Design Process

3.1The Choices of Methodology: ASIC Vs COT, Flat Vs Hierarchical, IP based vs Non-IP based
3.2 The Choices of Tools & Vendors: Point Tools Vs Total Solutions (Frameworks)
3.3 The Importance of a High Quality Cell Library
3.4 The Importance of Choosing IP Vendors
3.5 The Importance of Scripting in IC Design Activity Automation
3.6 The Issues on Migrating from Reverse Engineering Flow to Top-down Design Flow
3.7 The Issues on Migrating from FPGA to ASIC Flow
3.8 The Issues on Migrating from ASIC Flow to COT Flow
3.9 On Interacting with EDA Vendors
3.10 On Interacting with Foundry
3.10.1 Using the Vendor‘s Expertise
3.10.2 Vendor Selection
3.10.3 RFQ Details
3.10.3 Vendor Comparisons
3.10.4 ASIC Vendor Services
3.10.4 Effect of the Vendor on Timescales
3.10.5 Provision of Engineering Samples & Production Chips
3.10.6 Liaison with the Vendor During the Project 1 On Interacting with Clients 2 Open Discussion

2nd Day (9:00AM ~ 12:00AM) 1. Tips & Guidelines on ASIC/SoC Specification & Synthesis
1.1 Design Specification: Functional View Vs Timing View
1.2 Specification Capture Abstraction Levels: Algorithm, Behavioral & Transaction-level
1.3 RTL Coding Guidelines
1.4 Synthesizability, Testability & Routability
1.5 Design for Performance, Cost, Power & Reliability 1 Project Manager‘s Role on ASIC/SoC Specification & Synthesis 2 The Zero-Defect Design Approach - Quality Assurance in IC Design Project Management

2.1 Point Tools Approach Vs. Unified Database for Design Data Management
2.2 Review, Inspection & Their Check Lists
2.3 RTL Code Purification & Code Coverage
2.4 On Regression Test: Golden Result, Verification/Test Result, Comparison Result, Daily Build/Test & Milestone based Stabilize & Synchronize
2.5 Distributed Verification/Test with LFS
2.6 Build Your Regression Test Automation Tools with Perl/Tcl Scripting
2.7 Verification/Test Suites Reuse & Verification/Test Scripts Reuse 1 Project Manager‘s Role on Quality Assurance in ASIC/SoC Project Management 2 Tips & Guidelines on ASIC/SoC Verification & Optimization

3.1 Verification Strategies Revisited: Formal Verification, STA, Simulation &Testing
3.2 Optimization for Performance, Cost, Power & Reliability
3.3 Project Manager‘s Role on ASIC/SoC Verification & Optimization

4．Open Discussion

2nd Day(1:00PM ~ 4:00PM) 1. The Zero-Defect Design Approach - Configuration Management in IC Design Project Management
1.1 Why No IC Design, only IC Design Versions? ? The Importance of Build & Configuration
1.2 Typical Daily Build & Release Process under the Context of Quick Mode Testing
1.3 The Typical Milestone based Synchronization Process under the Context of Full Mode Testing
1.4 SCM in Supporting Concurrent Development & Multi-site Development with ClearCase
1.5 Manual Merging Vs Automatic Merging on Design Artifacts
1.6 Version Control System in Depth & Client/Server CVS Demo
1.7 Change Request (CR) Tracking System in Depth & IssueView Demo
1.8 How to Automate and/or Stream Your SCM Process and Why Complete Automation Is Hard? 1 Project Manager‘s Role on Configuration Management in ASIC/SoC Project Management 2 Politics on People Management in IC Design Project

2.1 Requirements of The Project Leader/Project Manager: Technical Skills Vs People-and Team-Management Skills
2.2 Key Roles Within the Project Team: System Architect, Tools Expert, Verification Engineer, Designers & Team Leaders
2.3 Managing Engineers with Different Experience Levels
2.4 Maslow‘s Hierarchy of Needs
2.5 Getting to Know the Team Members: Interacting with the Impulsive Type Personality Vs Interacting with the Reflective Personality
2.6 Running Meetings: Technical Vs Business
2.7 Interviewing New Candidates
2.8 Time Management: Group Vs Personal 1 Emphasize on Training: Technical Training, Personal Training, Product/Design-Specific Training 2 Specific Issues on Managing IP-based Reuse Oriented SoC Project - An Introduction

3.1 Design for Reuse Revisited
3.2 Design for Reuse Company Standards
3.3 Design for Reuse Coding Style
3.4 SoC and Third-Party IP Integration
3.5 System-Level Design Languages: SystemC Vs SystemVerilog 1 IP-based SoC Integration Standards: VSIA Vs OCP 2 Open Discussion

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